Zhu Yun (朱筠)* **,Zhou Jinna**,Xie Xiaoyan**,Jiang Lin***,Wang Shuxin**,Shen Xubang****.[J].高技术通讯(英文),2021,27(4):365~372 |
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Reconfigurable implementation ARP based on depth threshold in 3D-HEVC |
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DOI:10.3772/j.issn.1006-6748.2021.04.004 |
中文关键词: |
英文关键词: 3 dimension high-efficiency video coding (3D-HEVC), advanced residual predic-tion (ARP), reconfigurable method |
基金项目: |
Author Name | Affiliation | Zhu Yun (朱筠)* ** | (*School of Microelectronics, Xidian University, Xi’an 710071, P.R.China)
(**Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(***Xi’an University of Science and Technology, Xi’an 710054, P.R.China)
(****Xi’an Microelectronic Technology Research Institute, Xi’an 710065, P.R.China) | Zhou Jinna** | (*School of Microelectronics, Xidian University, Xi’an 710071, P.R.China)
(**Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(***Xi’an University of Science and Technology, Xi’an 710054, P.R.China)
(****Xi’an Microelectronic Technology Research Institute, Xi’an 710065, P.R.China) | Xie Xiaoyan** | (*School of Microelectronics, Xidian University, Xi’an 710071, P.R.China)
(**Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(***Xi’an University of Science and Technology, Xi’an 710054, P.R.China)
(****Xi’an Microelectronic Technology Research Institute, Xi’an 710065, P.R.China) | Jiang Lin*** | (*School of Microelectronics, Xidian University, Xi’an 710071, P.R.China)
(**Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(***Xi’an University of Science and Technology, Xi’an 710054, P.R.China)
(****Xi’an Microelectronic Technology Research Institute, Xi’an 710065, P.R.China) | Wang Shuxin** | (*School of Microelectronics, Xidian University, Xi’an 710071, P.R.China)
(**Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(***Xi’an University of Science and Technology, Xi’an 710054, P.R.China)
(****Xi’an Microelectronic Technology Research Institute, Xi’an 710065, P.R.China) | Shen Xubang**** | (*School of Microelectronics, Xidian University, Xi’an 710071, P.R.China)
(**Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(***Xi’an University of Science and Technology, Xi’an 710054, P.R.China)
(****Xi’an Microelectronic Technology Research Institute, Xi’an 710065, P.R.China) |
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中文摘要: |
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英文摘要: |
Aiming at the high computational complexity and low efficiency of the advanced residual prediction (ARP) algorithm in 3 dimension high-efficiency video coding (3D-HEVC), the relationship between the depth value and ARP is analyzed. A fast ARP algorithm based on the depth value is proposed, which is implemented on the reconfigurable array processor developed by the project team. It uses a reconfigurable method to realize flexible switching between interview-ARP and temporal ARP. Experimental results show that while keeping the coding rate and the peak signal-to-noise ratio (PSNR) basically unchanged, the coding time of the six test sequences is reduced by 16.21% on average compared with HTM16.1. In contrast with non-reconfiguration, the average coding time is reduced by 52%, so the computational efficiency is improved. |
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