| Xie Xiaoyan (谢晓燕)*,Wang Yu*,Shi Pengfei*,Zhu Yun**,Deng Junyong**,Zhao Huan*.[J].高技术通讯(英文),2021,27(4):430~439 |
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| Wedge template optimization and parallelization of depth map in intra-frame prediction algorithms |
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| DOI：10.3772/j.issn.1006-6748.2021.04.012 |
| 中文关键词: |
| 英文关键词: 3D high-efficiency video coding (3D-HEVC), wedge segmentation, simplified search template, parallelization, depth model mode (DMM) |
| 基金项目: |
| Author Name | Affiliation | | Xie Xiaoyan (谢晓燕)* | (*School of Computing Science & Technology, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(**School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China) | | Wang Yu* | (*School of Computing Science & Technology, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(**School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China) | | Shi Pengfei* | (*School of Computing Science & Technology, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(**School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China) | | Zhu Yun** | (*School of Computing Science & Technology, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(**School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China) | | Deng Junyong** | (*School of Computing Science & Technology, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(**School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China) | | Zhao Huan* | (*School of Computing Science & Technology, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China)
(**School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Xi’an 710121, P.R.China) |
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| 中文摘要: |
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| 英文摘要: |
| To reduce the computational complexity and storage cost caused by wedge segmentation algorithm, a scheme of simplifying wedge matching is proposed. It takes advantage of the correlation of the wedge separation line of depth map and the direction of intra-prediction for 3D high-efficiency video coding (3D-HEVC). According to the difference of wedge segmentation between adjacent edge and opposite edge, a set only including 10 4×4 wedgelet templates is given. By expanding of the wedge wave of a certain minimum unit, a simple separation line acquisition method for different size of depth block is put forward. Furthermore, based on the array processor (DPR-CODEC) developed by project team, an efficient parallel scheme of the improved wedge segmentation mode prediction is introduced. By the scheme, prediction unit (PU) size can be changed randomly from 4×4 to 8×8, 16×16, and 32×32, which is more in line with the needs of the HEVC standard. Verified with test sequence in HTM16.1 and the Xilinx virtex-6 field programmable gate array (FPGA) respectively, the experiment results show that the proposed methods save 99.2% of the storage space and 63.94% of the encoding time, the serial/parallel acceleration ratio of each template reaches 1.84 in average. The coding performance, storage and resource consumption are considered for both. |
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