| Ruan Weihua (阮伟华),Hu Qingsheng.[J].高技术通讯(英文),2014,20(3):328~332 |
|
| A 14.5Gb/s word alignment circuit in 0.18μm CMOS technology for high-speed SerDes |
| |
| DOI：10.3772/j.issn.1006-6748.2014.03.016 |
| 中文关键词: |
| 英文关键词: comma detection， word alignment， pipeline， full custom， parallel structure |
| 基金项目: |
| Author Name | Affiliation | | Ruan Weihua (阮伟华) | | | Hu Qingsheng | |
|
| Hits: 756 |
| Download times: 550 |
| 中文摘要: |
| |
| 英文摘要: |
| This paper presents a word alignment circuit for high speed SerDes system. By using pipeline structure and circuit optimization techniques, the speed of the aligner is increased, and its performance is improved further through adopting the full custom design method. The proposed word aligner has fabricated in 0.18μm CMOS technology with total area of 1.075×0.775mm2 including I/O pad. Measurement results show that this circuit achieves the maximum data rate of 14.5Gb/s, while consuming a total power of 34.9mW from a 1.8V supply. |
|
View Full Text
View/Add Comment Download reader |
| Close |
