| Liu Hao (刘浩),Cao Feifei,Zhou Ning,Zou Xuecheng,Liu Dongsheng.[J].高技术通讯(英文),2013,19(1):24~29 |
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| Design of an unbuffered switch for network on-chip |
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| DOI： |
| 中文关键词: |
| 英文关键词: network on-chip (NoC), router architecture, buffer, low-cost |
| 基金项目: |
| Author Name | Affiliation | | Liu Hao (刘浩) | | | Cao Feifei | | | Zhou Ning | | | Zou Xuecheng | | | Liu Dongsheng | |
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| 中文摘要: |
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| 英文摘要: |
| In the complex multicore chip system, network on-chip (NoC) is viewed as a kind of system interconnection that can substitute the traditional interconnect networks, which will improve the system performance and communication efficiency. With regard to the complex and large scale NoC, simple and efficient routing nodes are the critical factors to achieve low-cost and low-congestion communication performance.This paper proposes an unbuffered switch architecture and makes detailed analysis of the mechanism of buffer in the switch architecture. According to the simulation results, the S-mesh using the unbuffered switch architecture is better in terms of the optimal performance in message latency than some typical NoC architectures, such as 2D-mesh, Fat-tree, Butterfly, Octagon and so on. The synthesis results of design compiler indicate that the unbuffered switch has obvious advantages of achieving cost and operating speed for the chips. |
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