| 薛峰* **,韩晨吉* **,汪文祥** ***,张福新*.基于决策树的间接访存数据预取激进度调节方法[J].高技术通讯(中文),2026,36(2):111~122 |
| 基于决策树的间接访存数据预取激进度调节方法 |
| Decision tree based aggressiveness controller for indirect memory access prefetching |
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| DOI：10. 3772 / j. issn. 1002 - 0470. 2026. 02. 001 |
| 中文关键词: 预取激进度调节； 间接访存； 数据预取； 决策树； 通用处理器； 多核系统 |
| 英文关键词: prefetching aggressiveness adjustment, indirect memory access, data prefetching, decision tree, general-purpose processor, multi-core system |
| 基金项目: |
| 作者 | 单位 | | 薛峰* ** | （*处理器芯片全国重点实验室（中国科学院计算技术研究所）北京 100190）
（**中国科学院大学北京 100049）
（***龙芯中科技术有限公司北京 100190） | | 韩晨吉* ** | | | 汪文祥** *** | | | 张福新* | |
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| 中文摘要: |
| 在通用处理器中，间接访存（indirect memory access，IMA）是一种常见的访存模式，目前已有许多针对间接访存的数据预取器。尽管这些预取器在单核系统中能够显著提升处理器性能，但针对单核系统设置的较为激进的预取配置在多核系统中未能带来同样显著的性能提升。这主要由于单核与多核系统中访存带宽需求的差异导致预取器的最佳激进度不同。现有的预取激进度调节算法大多需要手动设置调节规则，不仅效率较低，还存在调节策略不准确的问题。针对上述问题，本文提出了针对间接访存数据预取器的激进度调节算法DTPAC（decision tree-based prefetcher aggressiveness controller），利用决策树算法自动训练出调节策略，避免了手动设置调节规则的缺点。实验结果表明，在间接访存数据预取器Tyche上，DTPAC在四核系统中提升了13.2%的性能，超过现有预取激进度调节方法FDP（feedback directed prefetching）和CLIP，同时将内存流量降低了20.0%。此外，在四核系统中，DTPAC对另外2个间接访存数据预取器Gretch和IMP(indirect memory prefetcher)性能分别提升6.8%和5.5%。 |
| 英文摘要: |
| Indirect memory access (IMA) is a prevalent memory access pattern in general-purpose processors, and numerous prefetchers dedicated to handling indirect memory accesses have been developed. Although these prefetchers significantly improve the performance of processors in single-core systems, we have observed that the aggressive prefetching configurations used in single-core systems do not yield the same level of performance improvement in multi-core systems. This discrepancy is primarily attributed to the different memory bandwidth demands between single-core and multi-core systems, which result in varying optimal levels of prefetching aggressiveness. The existing methods for adjusting prefetching aggressiveness mostly involve manual setting of adjustment rules, which is not only inefficient but also prone to inaccuracies in adjustment strategies. To address these issues, this paper introduces the DTPAC(decision tree-based prefetcher aggressiveness controller), a method for automatically adjusting the aggressiveness of prefetchers for indirect memory accesses using decision tree algorithms, thereby avoiding the drawbacks of manual rule-setting. Experimental results demonstrate that on the indirect memory access prefetcher Tyche, DTPAC improves performance by 13.2% in a quad-core system, outperforming existing methods such as FDP and CLIP. Additionally, DTPAC reduces memory traffic by 20.0%. Furthermore, in a quad-core system, DTPAC also enhances the performance of two other indirect memory access prefetchers, Gretch and IMP, by 6.8% and 5.5%, respectively. |
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