| 李作骏,卢天越,陈明宇.基于前递预取的SoC内存控制器精准仿真方法[J].高技术通讯(中文),2025,35(5):480~489 |
| 基于前递预取的SoC内存控制器精准仿真方法 |
| A precise simulation method for SoC memory controller based on forwarding and prefetching |
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| DOI：10. 3772 / j. issn. 1002-0470. 2025. 05. 004 |
| 中文关键词: 内存控制器； 现场可编辑门阵列； 性能评估； 双倍数据速率； 动态随机访问存储器 |
| 英文关键词: memory controller, field programmable gate array, performance evaluation, double data rate, dynamic random access memory |
| 基金项目: |
| 作者 | 单位 | | 李作骏 | (中国科学院计算技术研究所先进计算机系统研究中心北京 100190)
(中国科学院大学计算机科学与技术学院北京 100190) | | 卢天越 | | | 陈明宇 | |
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| 中文摘要: |
| 本文提出一种基于现场可编辑门阵列(field programmable gate array，FPGA)的内存控制器性能精确仿真评估方法，通过高速可扩展接口（advanced extensible interface，AXI）总线前递、访存预取和数据缓存的方式解决了FPGA芯片内外访存时序需求不一致的问题，从而实现了在真实处理器系统应用仿真场景下对内存控制器的精确性能评估。与香山开源第5代精简指令集计算机（reduced instruction set computer-five，RISC-V）处理器雁栖湖架构硅后芯片对比，SPEC CPU2006基准测试程序的执行时间平均偏差为1.29%，最大偏差为3.45%。该方法解决了因为内存控制器模型不准确而导致FPGA片上系统（system of chip，SoC）原型系统中真实应用仿真性能评估与流片后实际性能存在较大偏差的问题，同时无需进行大量修改就能用于任何支持AXI和双倍数据速率物理层接口（DDR PHY interface，DFI）协议的标准内存控制器精确仿真。 |
| 英文摘要: |
| In this paper, an accurate simulation method of memory controller performance evaluation based on field programmable gate array (FPGA) is proposed, which solves the problem of inconsistence between internal and external memory access timing requirements of FPGA chip through advanced extensible interface (AXI) bus forwarding, memory prefetch and data cache. It can be implemented to evaluate the accurate memory controller performance under precise processor prototype with real applications. Compared with the post-silicon chip of the Xiangshan open-source RISC-V processor Yanqihu architecture, the SPEC CPU2006 benchmark runtime shows an average deviation of 1.29% and a maximum deviation of 3.45%. This method reduces the large deviation of real application performance evaluation results between pre-silicon FPGA system of chip (SoC) prototype and post-silicon test, which is primarily caused by inaccurate memory controller model. Furthermore, it can be used for accurate simulation of any standard memory controller supporting AXI and DFI protocol with minor modification. |
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